1. Field of the invention
The present invention relates to video processing input stages and more particularly to a calibration device for an input stage for processing video signals.
2. Description of the Related Art
Input stages for processing video signals typically comprise a calibration circuit for calibrating downstream-located circuits in the receiver and for avoiding any saturation of these circuits. A reference signal—corresponding to black coding—is used right after the line synchronization signal of the video signal, and the receiving circuit uses this black reference to calibrate its internal circuits in order to avoid any saturation.
Two solutions are typically implemented in designing such a circuit, according to whether an analog or digital architecture is preferred.
FIG. 1 shows a flowchart of an analog architecture. The circuit comprises a capacitor 2 for eliminating the continuous component from an input signal presented on a line 1. Capacitor 2 can be charged and discharged by a <<I-8I>> assembly of two power sources 3 and 4 that respectively allow to feed or draw current in order to set the voltage downstream from capacitor 2 to an adequate value. Thus, the video signal—with a correctly set continuous component—can be injected into an analog filter 6 that extracts black level therefrom, and the video signal is then presented to the input of an analog-to-digital converter A/D 5 producing a N-bit digital code.
Generally, for the reception of the reference signal corresponding to black, one tries to ensure an average coding equal to 0 (on N bits) in order to profit from the dynamics of the coding system and thus to avoid its saturation. To this end, a comparator 7 is used to compare the output voltage of filter 6 with a reference voltage Vref, and to produce a control signal controlling power source 4 and inverter element 8 that controls the other power source 3.
The analog structure design is of great simplicity. However, this structure has several crippling disadvantages. Indeed, voltages tend to drift, which degrades the precision of the circuit. Besides, the existence of an offset voltage in comparator 7 worsens this disadvantage. In addition, convergence of the working point, which is set by the value of I-8Icurrents, is not very fast. Moreover, in this circuit, assembly I-8Ifunctions continuously: a current is generated either by source 3, or by source 4 resulting in an oscillation with considerable amplitude around the ideal point, which further degrades the circuit's precision.
To improve calibration precision, an “all digital” architecture is chosen, which requires a great amount of digital signal processing. An example of such an architecture is given in FIG. 2, which shows that circuit <<I-8I>> can be controlled by a digital central processing unit 24 by means of two control signals UP and DOWN that directly control sources 3 and 4, respectively. Downstream from the coupling capacitor 2, the video signal is amplified by a VGA amplifier 23 and the amplified signal can then be directly fed into analog-to-digital converter 5. N-bit coded digital samples are then adequately processed by central processing unit 24 that extracts the level of black and compares it with the reference voltage in order to determine control signals UP and DOWN.
Clearly, the use of a digital architecture as the one in FIG. 2 makes it possible to considerably increase precision in adjusting the input voltage to the A/D converter. It further allows to precisely control the adjusting rate to the reference voltage. On the other hand, part of the complexity of the process has been transferred since digital processing is now necessary to carry out the extraction of the level of black, which, in practice, is actually a delicate task to perform.
Consequently it is desirable to design an input stage for a video signal which makes it possible to benefit from the precision conferred by digital processing, while minimizing the complexity of the digital calculation to be implemented.